With the advent of low cost, high density integrated circuits, battery powered microprocessor controlled devices have become increasingly popular. One example of a battery powered microprocessor controlled device is a portable bar code reader of the type employed by overnight delivery services, supermarkets and others to scan and store bar code data.
A major limitation of battery powered microprocessor controlled devices is the battery life. Such devices are not useful in a practical sense if the battery life is too short. Of course, battery life may be extended by improving the batteries themselves or by providing more batteries in the device. However, such improvements often increase the cost, size and/or weight of the device.
Battery life may also be extended by improving the microprocessor control system so that it consumes less power during device operation. For example, U.S. Pat. No. 4,673,805 to Shepard et al. entitled Narrow-Bodied, Single-And Twin-Windowed Portable Scanning Head For Reading Bar Code Symbols discloses a system in which a trigger signal or keyboard entry activates a microprocessor in a scanner, which in turn activates a laser for bar code scanning. After a scan or data entry the microprocessor is deactivated. Unfortunately, for sophisticated battery powered devices, the microprocessor cannot be deactivated because there are certain "background" tasks, for example maintaining correct time of day, which must always be performed. A similar system is described in U.S. Pat. No. 4,203,153 to Boyd entitled Circuit For Reducing Power Consumption In Battery Operated Microprocessor Based Systems in which a microprocessor is powered up only during programmed task performance. A timer, which may be fixed or programmable, reactivates the microprocessor after a predetermined timing interval As stated above, sophisticated systems cannot permit the microprocessor to be deactivated.
It is known in the art to employ systems with two processors having different characteristics. For example, U.S. Pat. No. 4,677,433 to Catlin et al. entitled Two-Speed Clock Scheme For Co-Processors discloses a system including two processors one of which is a high speed microprocessor, the other of which is a low speed numeric data processor. The system runs at low speed when both processors must be used and runs at high speed when only the microprocessor needs to be used. A source control provides a high or low speed clock via a clocking generator which is coupled to both processors. There is no suggestion to use such a system for power conservation.
It is also known in the art to operate a microprocessor at two speeds to conserve power. For example, U.S. Pat. No. 4,254,475 to Cooney et al. entitled Microprocessor Having Dual Frequency Clock discloses a power conservation system in which a microprocessor operates at low speed until a sensor is activated or a predetermined time duration has passed. When either of these events occur, the high speed clock is activated. Similarly, a .mu.PD7507/08 Four Bit Single Chip CMOS Microprocessor distributed by NEC Electronics, Inc. (Mountain View, Calif.) may be controlled to run at a plurality of clock speeds by a plurality of clock sources.